The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Oct. 15, 2013
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventor:

Yuichi Nakao, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 21/762 (2006.01); H01L 27/115 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66825 (2013.01); H01L 21/28273 (2013.01); H01L 21/76232 (2013.01); H01L 27/11521 (2013.01); H01L 29/42324 (2013.01);
Abstract

A method for manufacturing a semiconductor storage device includes forming a first insulating film on a semiconductor substrate; forming a first conductive layer; forming a trench in the semiconductor substrate and the first conductive layer by etching; forming a deposition layer by depositing an insulating material in the trench; removing by etching a side portion of the deposition layer to form a side surface that has a flat surface and a curved surface with a lower edge that is in contact with a side surface of the first conductive layer and to form a gap between the curved and the side surfaces; forming a second conductive layer; removing the deposition layer until at least the curved surface of the side surface is exposed to form an embedded insulator in the trench; forming a second insulating film; and forming a control gate on the embedded insulator and the second insulating film.


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