The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Apr. 11, 2014
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Siamak Fazelpour, San Diego, CA (US);
Charles David Paynter, Encinitas, CA (US);
Ryan David Lane, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 21/48 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01); H01R 13/6471 (2011.01);
U.S. Cl.
CPC ...
H01L 21/4885 (2013.01); H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01L 2223/6638 (2013.01); H01L 2924/1579 (2013.01); H01L 2924/15312 (2013.01); H01L 2924/15313 (2013.01); H01R 13/6471 (2013.01);
Abstract
The disclosure is related to pin layouts in a semiconductor package. One embodiment of the disclosure provides a rhombus shaped shared reference pin layout that isolates a set of differential pin pairs. The differential signal pin pairs are configured such that an axis formed by a vertical signal pin pair is orthogonal to and mutually bisecting an axis formed by a lateral signal pin pair.