The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Sep. 04, 2014
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Jeffrey W. Sleight, Ridgefield, CT (US);
Sarunya Bangsaruntip, Mount Kisco, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/02 (2006.01); H01L 29/775 (2006.01); B82Y 10/00 (2011.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); B82Y 40/00 (2011.01); B82Y 99/00 (2011.01);
U.S. Cl.
CPC ...
H01L 21/02603 (2013.01); B82Y 10/00 (2013.01); H01L 21/02664 (2013.01); H01L 29/0669 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66818 (2013.01); H01L 29/775 (2013.01); H01L 29/78696 (2013.01); B82Y 40/00 (2013.01); B82Y 99/00 (2013.01);
Abstract
Non-planar semiconductor devices including at least one semiconductor nanowire having a tapered profile which widens from the source side of the device towards the drain side of the device are provided which have reduced gate to drain coupling and therefore reduced gate induced drain tunneling currents.