The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Sep. 24, 2015
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Jayant Ashokkumar, Colorado Springs, CO (US);

Donald J. Verhaeghe, Colorado Springs, CO (US);

Alan D DeVilbiss, Colorado Springs, CO (US);

Qidao Li, Colorado Springs, CO (US);

Fan Chu, Colorado Springs, CO (US);

Judith Allen, Monument, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 14/00 (2006.01); G11C 11/22 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 14/0072 (2013.01); G11C 11/221 (2013.01); G11C 11/2273 (2013.01); G11C 11/419 (2013.01);
Abstract

A memory device and array which includes a static random access memory (SRAM) circuit coupled to a non-volatile circuit, such as a ferroelectric-RAM (F-RAM) circuit, in which the F-RAM circuit stores a bit of data from the SRAM circuit during power-out periods, the F-RAM circuit is further coupled to bit-line(s) to output the bit of data stored in the F-RAM circuit when operation power is restored.


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