The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Mar. 25, 2015
Applicants:

Zvi Guz, Palo Alto, CA (US);

Liang Yin, San Jose, CA (US);

Inventors:

Zvi Guz, Palo Alto, CA (US);

Liang Yin, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/4078 (2006.01); G11C 11/4091 (2006.01); G11C 11/4072 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4078 (2013.01); G11C 11/4072 (2013.01); G11C 11/4091 (2013.01); G11C 11/4094 (2013.01);
Abstract

Embodiments of the inventive concept include a volatile memory device including a memory cell array, the memory cell array including multiple rows and/or banks to store data. The memory device can include an address decoder coupled to the memory cell array. The memory device can include a control logic section coupled to the address decoder. The control logic section can include a defresh logic section configured to intentionally violate, by an activate command, a row precharge time (T) and/or a row active time (T) for each of the plurality of rows to clean the data from the memory cell array. Memory data can be cleaned from the memory cell array responsive to the violations.


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