The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Nov. 12, 2014
Applicants:

Hiroyuki Sugiyama, Kanagawa, JP;

Shigekazu Koguchi, Kanagawa, JP;

Masahiko Shakuto, Kanagawa, JP;

Shinji Minami, Kanagawa, JP;

Tomoko Takahashi, Kanagawa, JP;

Yoshinori Nakagawa, Kanagawa, JP;

Ryuji Yoshida, Kanagawa, JP;

Taichi Urayama, Kanagawa, JP;

Inventors:

Hiroyuki Sugiyama, Kanagawa, JP;

Shigekazu Koguchi, Kanagawa, JP;

Masahiko Shakuto, Kanagawa, JP;

Shinji Minami, Kanagawa, JP;

Tomoko Takahashi, Kanagawa, JP;

Yoshinori Nakagawa, Kanagawa, JP;

Ryuji Yoshida, Kanagawa, JP;

Taichi Urayama, Kanagawa, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03G 15/02 (2006.01); G03G 15/06 (2006.01); G03G 15/00 (2006.01); G03G 15/01 (2006.01);
U.S. Cl.
CPC ...
G03G 15/065 (2013.01); G03G 15/0266 (2013.01); G03G 15/50 (2013.01); G03G 15/0121 (2013.01);
Abstract

An image forming apparatus includes an electrostatic latent image bearer; a charger to charge a surface of the electrostatic latent image bearer; a power source to output a charging bias supplied to the charger; an electrostatic latent image writing unit to write an electrostatic latent image on the surface of the electrostatic latent image bearer charged by the charger; a developing unit including a developing member to develop the electrostatic latent image to obtain a toner image; a developing power source to output a developing bias supplied to the developing unit; a processor to adjust the charging bias output from the power source to a predetermined target value; and a storage unit to store an adjustment value algorithm.


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