The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Mar. 17, 2015
Applicant:

AU Optronics Corp., Hsin-Chu, TW;

Inventors:

Chia-Fang Chen, Hsin-Chu, TW;

Yu-Hao Chen, Hsin-Chu, TW;

Po-Yuan Shen, Hsin-Chu, TW;

Assignee:

AU OPTRONICS CORP., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1345 (2006.01); G02F 1/1339 (2006.01); G02F 1/1368 (2006.01); G02F 1/1335 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13454 (2013.01); G02F 1/1339 (2013.01); G02F 1/1368 (2013.01); G02F 1/133512 (2013.01);
Abstract

A display device includes a first substrate, a gate driver on array (GOA) circuit, a plurality of peripheral conductive wires, a second substrate, a sealant and a semi-transparent pattern. The GOA circuit is disposed in a gate driver region, and includes a plurality of thin film transistor devices. The peripheral conductive wires are disposed in a peripheral region of the first substrate, and the peripheral conductive wires are electrically connected to the GOA circuit. The sealant is disposed in at least a portion of the peripheral region and a portion of the gate driver region, and the sealant overlaps at least a portion of the peripheral conductive wires and a portion of the thin film transistor devices of the GOA circuit in a vertical direction. The semi-transparent pattern is disposed on the second substrate, and a transmittance of the semi-transparent pattern is between 10% and 80%.


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