The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Dec. 19, 2013
Applicant:

Hitachi Information & Telecommunication Engineering, Ltd., Kanagawa, JP;

Inventors:

Hironori Komi, Tokyo, JP;

Yusuke Yatabe, Tokyo, JP;

Kyohei Unno, Tokyo, JP;

Yoshiyuki Motoba, Yokohama, JP;

Toshiaki Hori, Yokohama, JP;

Yoshimasa Kashihara, Yokohama, JP;

Toshikazu Yanagihara, Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 11/02 (2006.01); H04N 19/50 (2014.01); H04N 19/172 (2014.01); H04N 19/61 (2014.01); H04N 19/109 (2014.01); H04N 19/132 (2014.01); H04N 19/136 (2014.01); H04N 19/156 (2014.01); H04N 19/42 (2014.01); H04N 19/426 (2014.01); H04N 19/577 (2014.01);
U.S. Cl.
CPC ...
H04N 19/00569 (2013.01); H04N 19/109 (2014.11); H04N 19/132 (2014.11); H04N 19/136 (2014.11); H04N 19/156 (2014.11); H04N 19/172 (2014.11); H04N 19/42 (2014.11); H04N 19/426 (2014.11); H04N 19/428 (2014.11); H04N 19/577 (2014.11); H04N 19/61 (2014.11);
Abstract

An image compression/decompression device achieving increased utilization efficiency of the memory bandwidth in the access to the memory used for the compression/decompression operation while maintaining ill effect on the images at a low level is realized. The image compression/decompression device comprises a data conversion unit which reduces the data access rate when original images (as input images at the time of performing the compression) and reference images (used for performing the interframe prediction) are stored in the memory by accessing the memory. The access to the memory is performed in an address sequence (order) that differs between data write and data read. This makes it possible to increase the utilization efficiency of the memory bandwidth, and further to reduce the capacity of the buffer memory used for the data read.


Find Patent Forward Citations

Loading…