The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Nov. 23, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Yasufumi Sakai, Fuchu, JP;

Toshihiko Mori, Isehara, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); H04L 27/02 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04L 27/02 (2013.01);
Abstract

A decision feedback equalizer for N-level amplitude modulated signal, includes: (N−1) level conversion circuits to add (N−1) shifting voltages to the amplitude modulated signal respectively; (N−1)×N determination feedback equalization-correction circuits to perform N types of decision feedback equalization processing, each of which adding each of N-level offset voltages corresponded to any one of N levels of a reception data ahead of one data cycle, on each of the (N−1) level shifted signals to generate (N−1) sets of N equalization correction signals; (N−1)×N comparison circuits; (N−1)×N first latch circuits; (N−1) selection circuits to select a comparison result of the N comparison circuits in each (N−1) sets; (N−1) second latch circuits; and a decoder, wherein each of the (N−1) selection circuits selects an equalization-correction signal among the N equalization-correction signals in each (N−1) set according to outputs latched by the (N−1) second latch circuits.


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