The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Nov. 13, 2014
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Kathiravan Krishnamurthi, Westford, MA (US);

Yumin Lu, Chelmsford, MA (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/14 (2006.01); H03F 3/72 (2006.01); H03F 3/19 (2006.01); H03G 1/00 (2006.01); H03F 3/195 (2006.01);
U.S. Cl.
CPC ...
H03F 3/72 (2013.01); H03F 3/19 (2013.01); H03F 3/195 (2013.01); H03G 1/0088 (2013.01); H03F 2203/7239 (2013.01);
Abstract

An amplifier circuit is disclosed comprising: an input terminal configured to receive a radio frequency input signal; an output terminal configured to provide a radio frequency output signal; a first transistor having a first collector, a first emitter, and a first base; a second transistor having a second collector, a second emitter, and a second base; a bypass switch; and a controller. The first base is connected to the input terminal and the second emitter. The first collector is connected to a circuit voltage supply and the output terminal. The first emitter is connected to ground and to the second base. The second collector is connected to a collector voltage supply. The bypass switch is connected between the first base and the output terminal. The controller is configured to operate the amplifier circuit in a normal mode of operation or a bypass mode of operation in accordance with an amplitude level of the radio frequency input signal, wherein the controller is configured to open the bypass switch in the normal mode of operation and close the bypass switch in the bypass mode of operation to selectively bypass the first transistor.


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