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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9508832 B1

PDFFull Text
Date of Patent:
Nov. 29, 2016

Filed:

Jun. 24, 2015

Method of fabricating a semiconductor device

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Hyun Jung Lee, Suwon-si, KR;

Bonyoung Koo, Suwon-si, KR;

Sunjung Kim, Suwon-si, KR;

Jongryeol Yoo, Osan-si, KR;

Seung Hun Lee, Hwaseong-si, KR;

Poren Tang, Hwaseong-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do, KR;

Attorney:

Harness, Dickey & Pierce, P.L.C.

Primary Examiner:

Mary Wilczewski

Int. Cl.
CPC ...
H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/3085 (2013.01); H01L 21/76224 (2013.01); H01L 21/823412 (2013.01); H01L 21/823807 (2013.01);
Abstract

A method of fabricating a semiconductor device includes forming a channel layer on a substrate, forming a sacrificial layer on the channel layer, forming a hardmask pattern on the sacrificial layer, and performing a patterning process using the hardmask pattern as an etch mask to form a channel portion with an exposed top surface. The channel and sacrificial layers may be formed of silicon germanium, and the sacrificial layer may have a germanium content higher than that of the channel layer.

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