Array substrate, method for manufacturing the same and display device

Abstract

The present invention provides an arrayed substrate, a method for manufacturing the same and a display device. It relates to a field of display technology. The short-circuit defect between the lead wires may be avoided while reducing a spacing between the adjacent two lead lines in a limited space for wiring. The array substrate comprises a plurality of criss-cross gate lines and data lines within a display area, and the array substrate further comprises a first short-circuiting ring and a second short-circuiting ring within a non-display area, and first data lead wires and second data lead wires connected electrically with the first short-circuiting ring and the second short-circuiting ring respectively; the first data lead wires are provided in the same layer and made from the same material as the gate lines for connecting electrically the first short-circuiting ring with first data lines of the data lines; the second data lead wires are provided in the same layer and made from the same material as the data lines for connecting electrically the second short-circuiting ring with second data lines of the data lines; wherein the first data lines are interleaved with the second data lines.