The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2016
Filed:
Jul. 11, 2015
Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;
Zhenghao Gan, Shanghai, CN;
Abstract
The present disclosure provides integrated circuit (IC) devices and repair methods of the IC devices. An IC device includes a PMOS transistor including a substrate, a gate dielectric layer on the substrate, and a gate on the gate dielectric layer. The IC device also includes a repair circuit configured to apply a negative bias voltage to the substrate of the PMOS transistor, when the PMOS transistor is in an OFF state, to cause injections of electrons in the substrate into the gate dielectric layer to neutralize holes caused by negative bias temperature instability (NBTI) effect. The repair circuit is further configured to stop applying the negative bias voltage to the substrate of the PMOS transistor when the PMOS transistor is in an ON state. As such, the disclosed IC device repairs defect caused by NBTI effect in the PMOS transistor and prolongs the lifespan of the PMOS transistor.