The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Mar. 11, 2013
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventors:

Mitsuhiko Ueda, Osaka, JP;

Yoshiharu Sanagawa, Osaka, JP;

Takanori Aketa, Osaka, JP;

Shintaro Hayashi, Hyogo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); B23K 20/00 (2006.01); H01L 21/52 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 24/97 (2013.01); B23K 20/00 (2013.01); H01L 21/52 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/75 (2013.01); H01L 24/83 (2013.01); H01L 21/6836 (2013.01); H01L 24/05 (2013.01); H01L 24/27 (2013.01); H01L 24/30 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/04026 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05664 (2013.01); H01L 2224/05669 (2013.01); H01L 2224/2745 (2013.01); H01L 2224/2746 (2013.01); H01L 2224/2908 (2013.01); H01L 2224/29011 (2013.01); H01L 2224/29012 (2013.01); H01L 2224/29013 (2013.01); H01L 2224/29082 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/29144 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/3003 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32227 (2013.01); H01L 2224/32501 (2013.01); H01L 2224/32505 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/75252 (2013.01); H01L 2224/75301 (2013.01); H01L 2224/75744 (2013.01); H01L 2224/75745 (2013.01); H01L 2224/75753 (2013.01); H01L 2224/75901 (2013.01); H01L 2224/8301 (2013.01); H01L 2224/8309 (2013.01); H01L 2224/83013 (2013.01); H01L 2224/83065 (2013.01); H01L 2224/83075 (2013.01); H01L 2224/8383 (2013.01); H01L 2224/83123 (2013.01); H01L 2224/83127 (2013.01); H01L 2224/83193 (2013.01); H01L 2224/83203 (2013.01); H01L 2224/83207 (2013.01); H01L 2224/83805 (2013.01); H01L 2224/83825 (2013.01); H01L 2224/83906 (2013.01); H01L 2224/83907 (2013.01); H01L 2224/92247 (2013.01); H01L 2224/97 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/10161 (2013.01); H01L 2924/10162 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/12043 (2013.01); H01L 2924/1461 (2013.01);
Abstract

A mounting method of mounting chips on a substrate includes a temporarily-bonding process, and a main-bonding process. Temporarily-bonding process is to perform a first basic process, repeatedly depending on the number of the chips. First basic process includes a first step and a second step. First step is to align, on a first metal layer of the substrate, a second metal layer of each chip. Second step is to temporarily bond each chip by subjecting the first and second metal layers to solid phase diffusion bonding. Main-bonding process is to perform a second basic process, repeatedly depending on the number of the chips. Second basic process includes a third step and a fourth step. Third step is to recognize a position of each chip temporarily mounted on the substrate. Fourth step is to firmly bond each chip by subjecting the first and second metal layers to liquid phase diffusion bonding.


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