The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Nov. 09, 2015
Applicant:

Sharp Kabushiki Kaisha, Osaka-shi, Osaka, JP;

Inventor:

Kazuhide Tomiyasu, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/477 (2006.01); H01L 21/02 (2006.01); H01L 29/786 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02164 (2013.01); H01L 21/02211 (2013.01); H01L 21/02271 (2013.01); H01L 21/02274 (2013.01); H01L 21/02403 (2013.01); H01L 21/477 (2013.01); H01L 29/45 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78606 (2013.01); H01L 29/78696 (2013.01);
Abstract

This semiconductor device () includes a substrate () and a TFT which is provided on the substrate. The TFT includes a gate electrode (), an oxide semiconductor layer () which faces the gate electrode, source and drain electrodes () which are connected to the oxide semiconductor layer, and an insulating layer () which contacts at least partially with the source and drain electrodes. The insulating layer () includes a lower region () which contacts at least partially with the source and drain electrodes and an upper region () which is located over the lower region. The lower region () has a higher hydrogen content than the upper region ().


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