The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Aug. 03, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Mitsuru Tomono, San Jose, CA (US);

Hiroaki Yoshida, Cupertino, CA (US);

Kodai Moritaka, Ikoma, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 13/28 (2006.01); G06F 12/08 (2016.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 13/28 (2013.01); G06F 12/0842 (2013.01); G06F 15/7842 (2013.01); G06F 17/5045 (2013.01); G06F 2212/283 (2013.01);
Abstract

Aspects may include a method of designing a system-on-chip. The method may include receiving multiple processing modules, each representing in software one of multiple processing units of a system-on-chip. The method may further include modeling communications from one or more of the multiple processing modules as accesses to memory. The method may further include generating a coherent memory module associated with the multiple processing modules based on modeling the communications from the one or more of the multiple processing modules as accesses to memory. The coherent memory module may represent in software a coherent memory associated with the multiple processing units.


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