The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Apr. 15, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Dexter Tamio Chun, San Diego, CA (US);

Yanru Li, San Diego, CA (US);

Jung Pill Kim, San Diego, CA (US);

Deepti Vijayalakshmi Sriramagiri, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/20 (2006.01); G06F 11/10 (2006.01); G06F 11/14 (2006.01); G06F 11/07 (2006.01); G06F 11/08 (2006.01); G11C 29/00 (2006.01); G11C 29/52 (2006.01); G06F 3/06 (2006.01); G11C 29/08 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2017 (2013.01); G06F 3/0688 (2013.01); G06F 11/0772 (2013.01); G06F 11/08 (2013.01); G06F 11/1008 (2013.01); G06F 11/1016 (2013.01); G06F 11/1048 (2013.01); G06F 11/1417 (2013.01); G11C 29/00 (2013.01); G11C 29/08 (2013.01); G11C 29/52 (2013.01); G11C 29/70 (2013.01); G06F 2201/85 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/7201 (2013.01);
Abstract

Systems, methods, and computer programs are disclosed for recovering from dynamic random access memory (DRAM) defects. One method comprises determining that an uncorrected bit error has occurred for a physical codeword address associated with a dynamic random access memory (DRAM) device coupled to a system on chip (SoC). A kernel page associated with a DRAM page comprising the physical codeword address is identified as a bad page. Recovery from the uncorrected bit error is provided by rebooting a system comprising the SoC and the DRAM device. In response to the rebooting, the identified kernel page is excluded from being allocated for DRAM operation.


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