The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2016

Filed:

Jul. 29, 2014
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jung-Hoon Kim, Hwaseong-si, KR;

Jin-Hyuk Lee, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01L 23/52 (2006.01); H01L 23/36 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0207 (2013.01); H01L 23/36 (2013.01); H01L 23/52 (2013.01); H05K 1/0206 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/3511 (2013.01); H05K 1/0209 (2013.01); H05K 1/181 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10371 (2013.01); H05K 2201/10416 (2013.01);
Abstract

Embodiments of the inventive concept include a semiconductor device having a circuit board including a first outer layer, a contact region in the first outer layer, a second layer formed on an opposite side of the first outer layer, a via-hole, and a plurality of inner layers formed to be stacked between the first layer and the second layer. A case may accommodate the circuit board. The case may have a projection portion that is configured to come in contact with the circuit board in the contact region. The plurality of inner layers may include a ground layer. The first outer layer may be connected to the ground layer through a via-hole. The case may be connected to the ground layer through the first outer layer.


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