The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2016

Filed:

May. 08, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hong Bum Park, Seoul, KR;

Dong Chan Suh, Yongin-si, KR;

Kwan Heum Lee, Suwon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/336 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66636 (2013.01); H01L 29/165 (2013.01); H01L 29/665 (2013.01); H01L 29/66795 (2013.01); H01L 29/7834 (2013.01); H01L 29/7848 (2013.01);
Abstract

Provided is a method of manufacturing a semiconductor device including: forming a gate electrode structure on an active region of a semiconductor substrate; forming recesses in regions positioned on both sides of the gate electrode structure on the active region; performing a pre-treatment on the recesses using an inert gas plasma; growing epitaxial layers for a source and a drain on the pre-treated recesses; and forming a source electrode structure and a drain electrode structure in the epitaxial layers for the source and the drain, respectively. Also provided is a method in which, after an etching process for forming recesses and/or after an etching process for forming a contact hole, an etched surface may be treated with an inert gas plasma before growing an epitaxial layer. Thus, one or two types of plasma treatment may be employed in the method.


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