The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Nov. 01, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Hyungjoon Kwon, Seongnam-si, KR;

Sechung Oh, Suwon-si, KR;

Vladimir Urazaev, Suwon-si, KR;

Ken Tokashiki, Seongnam-si, KR;

Jongchul Park, Seongnam-si, KR;

Gwang-Hyun Baek, Seoul, KR;

Jaehun Seo, Suwon-si, KR;

Sangmin Lee, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 43/08 (2006.01); H01L 27/22 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 43/08 (2013.01); H01L 27/228 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/04 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); H01L 45/148 (2013.01);
Abstract

Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.


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