The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

May. 17, 2010
Applicants:

Ivy Wei Qin, Lansdale, PA (US);

Ray L. Cathcart, Elkins Park, PA (US);

Cuong Huynh, Radnor, PA (US);

Deepak Sood, New Britain, PA (US);

Paul W. Sucro, Hatfield, PA (US);

Joseph O. Deangelo, Winters, CA (US);

Inventors:

Ivy Wei Qin, Lansdale, PA (US);

Ray L. Cathcart, Elkins Park, PA (US);

Cuong Huynh, Radnor, PA (US);

Deepak Sood, New Britain, PA (US);

Paul W. Sucro, Hatfield, PA (US);

Joseph O. DeAngelo, Winters, CA (US);

Assignee:

Kulicke and Soffa Industries, Inc., Fort Washington, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/00 (2006.01); H01L 23/00 (2006.01); B23K 20/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/85 (2013.01); B23K 20/004 (2013.01); H01L 24/48 (2013.01); B23K 2201/42 (2013.01); H01L 2224/45015 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/484 (2013.01); H01L 2224/4809 (2013.01); H01L 2224/48095 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/859 (2013.01); H01L 2224/85181 (2013.01); H01L 2224/85203 (2013.01); H01L 2224/85205 (2013.01); H01L 2224/85207 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01057 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01082 (2013.01);
Abstract

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).


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