The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Mar. 03, 2015
Applicant:

Novellus Systems, Inc., Fremont, CA (US);

Inventors:

Damon Genetti, Livermore, CA (US);

Shawn Hamilton, Boulder Creek, CA (US);

Rich Blank, San Jose, CA (US);

James Sheldon Templeton, San Jose, CA (US);

Assignee:

Novellus Systems, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/677 (2006.01); B25J 13/00 (2006.01); H01L 21/68 (2006.01); H01L 21/67 (2006.01); H01L 21/673 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67196 (2013.01); H01L 21/67207 (2013.01); H01L 21/67259 (2013.01); H01L 21/67703 (2013.01); H01L 21/67742 (2013.01); H01L 21/67745 (2013.01); H01L 21/67754 (2013.01); Y10S 901/06 (2013.01); Y10S 901/09 (2013.01); Y10S 901/14 (2013.01);
Abstract

Methods and systems for positioning wafers using a dual side-by-side end effector robot are provided. The methods involve performing place moves using dual side-by-side end effector robots with active wafer position correction. According to various embodiments, the methods may be used for placement into a process module, loadlock or other destination by a dual wafer transfer robot. The methods provide nearly double the throughput of a single wafer transfer schemes by transferring two wafers with the same number of moves.


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