The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

May. 02, 2014
Applicant:

Samsung Display Co., Ltd., Yongin, KR;

Inventors:

Young Joo Choi, Suwon-si, KR;

Seung Ho Jung, Yongin-si, KR;

Joon Geol Kim, Hwaseong-si, KR;

Kang Moon Jo, Seoul, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01B 1/02 (2006.01); G02F 1/1333 (2006.01); G02F 1/1343 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
H01B 1/026 (2013.01); G02F 1/13439 (2013.01); G02F 1/13458 (2013.01); G02F 1/133345 (2013.01); G02F 1/134363 (2013.01); G02F 2001/13629 (2013.01); G02F 2001/134318 (2013.01); G02F 2001/136295 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A liquid crystal display and a method of fabricating a liquid crystal display (LCD), the LCD including a substrate; gate wiring including a gate pad, a gate electrode, and a gate line, which are formed on the substrate; a gate insulating layer disposed on the gate wiring; an electrode pattern including a connecting electrode, which is disposed on the gate insulating layer and is electrically connected to the gate pad, a source electrode and a drain electrode, which partially overlap the gate electrode; a pixel electrode, which is electrically connected to the drain electrode; a data line, which intersects the gate line; a semiconductor layer disposed on the gate electrode; first auxiliary wiring overlapping the data line and spaced from the semiconductor layer; and second auxiliary wiring overlapping the gate line.


Find Patent Forward Citations

Loading…