The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2016
Filed:
Dec. 11, 2014
Applicants:
Ankush Srivastava, Faridabad, IN;
Reinaldo Silveira, Sao Paulo, BR;
Inventors:
Ankush Srivastava, Faridabad, IN;
Reinaldo Silveira, Sao Paulo, BR;
Assignee:
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/44 (2006.01); G11C 29/00 (2006.01); G11C 15/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/4401 (2013.01); G11C 29/70 (2013.01); G11C 29/802 (2013.01); G11C 15/00 (2013.01); G11C 29/44 (2013.01); G11C 2029/4402 (2013.01);
Abstract
In a system on chip (SOC) device, continuity of a memory repair signature chain, which is accessible by all enabled memory systems, is provided, even when certain memory systems are gated (off) for certain SOC configurations. A mechanism for converting between compressed and uncompressed memory repair data within the repair chain is provided so that memory systems that support either uncompressed memory repair data (such as ternary content addressable memories) or compressed memory repair data can be incorporated in the SOC.