The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2016
Filed:
Aug. 15, 2013
Renesas Electronics Corporation, Tokyo, JP;
Tamiyu Kato, Tokyo, JP;
Renesas Electronics Corporation, Tokyo, JP;
Abstract
A memory array () includes a plurality of twin cells (), each of which is composed of a first memory element () and a second memory element () which are each electrically rewritable and configured to memorize binary data according to a difference in threshold voltages therebetween. A power supply control circuit (), upon receiving a request for erasing data in a twin cell, increases both the threshold voltage of the first memory element () and the threshold voltage of the second memory element () during the pre-writing, and after the pre-writing, differentiates the voltage of a first bit line (BL) which is connected to the first memory element () and the voltage of a second bit line (/BL) which is connected to the second memory element () during the application of erase pulse.