The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Mar. 09, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Dong Chen, Yorktown Heights, NY (US);

Noel A. Eisley, Wappingers Falls, NY (US);

Philip Heidelberger, Yorktown Heights, NY (US);

Burkhard Steinmacher-Burow, Boeblingen, DE;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); G06F 9/38 (2006.01); G06F 9/30 (2006.01); G06F 7/485 (2006.01);
U.S. Cl.
CPC ...
G06F 7/38 (2013.01); G06F 7/485 (2013.01); G06F 9/30014 (2013.01); G06F 9/30025 (2013.01); G06F 9/3885 (2013.01); G06F 2207/3808 (2013.01);
Abstract

To add floating point numbers in a parallel computing system, a collective logic device receives the floating point numbers from computing nodes. The collective logic devices converts the floating point numbers to integer numbers. The collective logic device adds the integer numbers and generating a summation of the integer numbers. The collective logic device converts the summation to a floating point number. The collective logic device performs the receiving, the converting the floating point numbers, the adding, the generating and the converting the summation in one pass. One pass indicates that the computing nodes send inputs only once to the collective logic device and receive outputs only once from the collective logic device.


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