The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Dec. 31, 2014
Applicant:

Gsi Technology, Inc., Sunnyvale, CA (US);

Inventors:

Patrick T. Chuang, Cupertino, CA (US);

Mu-Hsiang Huang, San Jose, CA (US);

Jae Hyeong Kim, San Ramon, CA (US);

Assignee:

GSI TECHNOLOGY, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01); G11C 16/26 (2006.01); G11C 11/4091 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31725 (2013.01); G11C 11/4091 (2013.01); G11C 16/26 (2013.01); G11C 7/065 (2013.01); G11C 7/067 (2013.01);
Abstract

Systems and methods of data inversion, circuitry, detection and/or schemes are disclosed. According to illustrative implementations, exemplary circuitry may include static detection or detection circuitry such as those involving static current sources to detect a threshold for data inversion, pre-conditioning of detection circuitry, and/or active detection circuitry or schemes. In some implementations, exemplary memory or data inversion circuitry may comprise a transistor array, a bias generator, and a sense amplifier, wherein the transistor array may comprise at least one pair of transistor circuits arranged so that an output of the transistor array is provided as a sum or function of signal/current outputs of at least some of the transistor circuits in the array. As set forth, various systems, methods and circuitry herein may posses only a 3 static gate delay, such that very high speed and/or fast flow-through is achieved.


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