The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Jan. 24, 2014
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Brian Smith, Santa Clara, CA (US);

Stephen Felix, Cambridge, GB;

Tezaswi Raja, Santa Clara, CA (US);

Roman Surgutchik, Santa Clara, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/317 (2006.01); H03K 3/03 (2006.01); G01R 1/30 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2858 (2013.01); G01R 1/30 (2013.01); G01R 31/2837 (2013.01); G01R 31/2851 (2013.01); G01R 31/31727 (2013.01); H03K 3/0315 (2013.01);
Abstract

A degradation detector for an integrated circuit (IC), a method of detecting aging in an IC and an IC incorporating the degradation detector or the method. In one embodiment, the degradation detector includes: (1) an offline ring oscillator (RO) coupled to a power gate and a clock gate, (2) a frozen RO coupled to a clock gate, (3) an online RO and (4) an analyzer coupled to the offline RO, the frozen RO and the online RO and operable to place the degradation detector in a normal state in which the offline RO is disconnected from both the drive voltage source and the clock source, the frozen RO is connected to the drive voltage source but disconnected from the clock source and the online RO is connected to both the drive voltage source and the clock source.


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