The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2016
Filed:
Apr. 01, 2014
Ikanos Communications, Inc., Fremont, CA (US);
Nicholas P. Sands, Sausalito, CA (US);
Kevin D. Fisher, Palo Alto, CA (US);
Ikanos Communications, Inc., Fremont, CA (US);
Abstract
A reduced-memory vectored DSL system reduces the bandwidth and memory storage demands on a vectored DSL system in which FEXT data is transmitted and stored. When test signal data, such as training and/or tracking data, is sent to determine FEXT characteristics of the DSL system, error signals are available for all or substantially all of the upstream and/or downstream frequency band DSL tones used in the system. Dividing a frequency band into sub-bands, only a subset of tones in each sub-band is used for deriving FEXT data. For tones in the sub-band subsets, full-precision FEXT data values can be derived. For other tones, approximations of the FEXT data can be derived. Memory is reduced in both the transmission of such FEXT data (between upstream and downstream ends) and within an upstream-end device such as a DSLAM that performs vectoring using a separate or internal vectoring processing apparatus.