The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

Jun. 23, 2015
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Tetsuo Nomoto, Kanagawa, JP;

Eiji Makino, Kanagawa, JP;

Keiji Mabuchi, Kanagawa, JP;

Tsutomu Haruta, Kanagawa, JP;

Shinjiro Kameda, Kanagawa, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 5/376 (2011.01); H04N 5/378 (2011.01); H04N 5/217 (2011.01); H04N 5/374 (2011.01); H04N 3/14 (2006.01); H04N 5/357 (2011.01); H04N 5/335 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14643 (2013.01); H01L 27/14612 (2013.01); H01L 27/14638 (2013.01); H04N 3/155 (2013.01); H04N 5/2173 (2013.01); H04N 5/335 (2013.01); H04N 5/357 (2013.01); H04N 5/374 (2013.01); H04N 5/378 (2013.01); H04N 5/3765 (2013.01);
Abstract

A MOS type solid state imaging device in which unit pixels, each having a photodiode, a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node are arrayed in a matrix. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example −1V).


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