The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

Jun. 26, 2012
Applicants:

Masumi Nomura, Isehara, JP;

Tatsuji Nishijima, Hadano, JP;

Kosei Noda, Atsugi, JP;

Inventors:

Masumi Nomura, Isehara, JP;

Tatsuji Nishijima, Hadano, JP;

Kosei Noda, Atsugi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 27/02 (2006.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 27/1108 (2013.01);
Abstract

A semiconductor device which is downsized while a short-channel effect is suppressed and whose power consumption is reduced is provided. A downsized SRAM circuit is formed, which includes a first inverter including a first transistor and a second transistor overlapping with each other; a second inverter including a third transistor and a fourth transistor overlapping with each other; a first selection transistor; and a second selection transistor. An output terminal of the first inverter, an input terminal of the second inverter, and one of a source and a drain of the first selection transistor are connected to one another, and an output terminal of the second inverter, an input terminal of the first inverter, and one of a source and a drain of the second selection transistor are connected to one another.


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