The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2016
Filed:
Oct. 30, 2013
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventor:
Hubert Maier, Villach, AT;
Assignee:
INFINEON TECHNOLOGIES AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/82 (2006.01); H01L 21/306 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 21/78 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 21/82 (2013.01); H01L 21/306 (2013.01); H01L 21/7685 (2013.01); H01L 21/78 (2013.01); H01L 23/3114 (2013.01); H01L 23/3157 (2013.01); H01L 23/3185 (2013.01); H01L 21/561 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A method for processing a wafer including a plurality of chips is provided. The method may include: forming a trench in the wafer between the plurality of chips; forming a diffusion barrier layer at least over the sidewalls of the trench; forming encapsulation material over the plurality of chips and in the trench; and singularizing the plurality of chips from a side opposite the encapsulation material.