The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

May. 08, 2014
Applicant:

Globalfoundries, Inc., Grand Cayman, KY;

Inventors:

Xiang Hu, Clifton Park, NY (US);

Huang Liu, Mechanicville, NY (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/28 (2006.01); H01L 21/8234 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 21/308 (2006.01); H01L 21/3105 (2006.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28123 (2013.01); H01L 21/28035 (2013.01); H01L 21/308 (2013.01); H01L 21/311 (2013.01); H01L 21/3105 (2013.01); H01L 21/31053 (2013.01); H01L 21/31111 (2013.01); H01L 21/3213 (2013.01); H01L 21/32133 (2013.01); H01L 21/823437 (2013.01); H01L 29/49 (2013.01); H01L 29/4916 (2013.01); H01L 29/66 (2013.01); H01L 29/6681 (2013.01); H01L 29/66553 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01);
Abstract

Integrated circuits with improved gate structures and methods for fabricating integrated circuits with improved gate structures are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate with fin structures. A gate-forming material is deposited over the semiconductor substrate and fin structures. The method includes performing a first etch process to etch the gate-forming material to form a gate line having a first side and a second side. The first side and second side of the gate line are bounded with material. The method includes performing a second etch process to etch a portion of the gate line bound by the material to separate the gate line into adjacent gate structures and to define a tip-to-tip distance between the adjacent gate structures.


Find Patent Forward Citations

Loading…