The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

Apr. 27, 2015
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Hyun Min Song, Sejong, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 (2006.01); G11C 17/16 (2006.01); H01L 27/112 (2006.01);
U.S. Cl.
CPC ...
G11C 17/16 (2013.01); G11C 17/165 (2013.01); H01L 27/112 (2013.01); G11C 5/025 (2013.01);
Abstract

An anti-fuse type one-time programmable (OTP) memory cell array includes a plurality of unit cells which are respectively located at cross points of a plurality of rows and a plurality of columns, a well region shared by the plurality of unit cells, a plurality of anti-fuse gates respectively disposed in the plurality of columns to intersect the well region, a plurality of source/drain regions respectively disposed in portions of the well region between the plurality of anti-fuse gates, and a plurality of drain regions respectively disposed in portions of the well region located at one sides of the anti-fuse gates arrayed in a last column, which are opposite to the anti-fuse gates arrayed in a first column. Each of the unit cells includes one anti-fuse transistor having a MOS transistor structure without a selection transistor.


Find Patent Forward Citations

Song, Hyun. (2016). Anti-fuse type one-time programmable memory cell array with plurality of unit cells, each made of a metal-oxide-semiconductor (mos) transistor structure without a selection transistor and method of operation the same (U.S. Patent No. 9490027). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9490027

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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