The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

Jan. 31, 2014
Applicant:

Vmware, Inc., Palo Alto, CA (US);

Inventors:

Daniel J. Scales, Mountain View, CA (US);

Pratap Subrahmanyam, Saratoga, CA (US);

Ganesh Venkitachalam, Mountain View, CA (US);

Michael Nelson, Alamo, CA (US);

Assignee:

VMware, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/16 (2006.01); G06F 11/14 (2006.01); G06F 11/20 (2006.01); G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1407 (2013.01); G06F 9/45558 (2013.01); G06F 11/1484 (2013.01); G06F 11/2038 (2013.01); G06F 11/2097 (2013.01); G06F 11/2048 (2013.01); G06F 2009/45583 (2013.01);
Abstract

A virtualization platform provides fault tolerance for a primary virtual machine by continuously transmitting checkpoint information of the primary virtual machine to a collector process, such as a backup virtual machine. When implemented on a hardware platform comprising a multi-processor that supports nested page tables, the virtualization platform leverages the nested page table support to quickly identify memory pages that have been modified between checkpoints. The backup virtual machine provides feedback information to assist the virtualization platform in identifying candidate memory pages for transmitting actual modifications to the memory pages rather than the entire memory page as part of the checkpoint information. The virtualization platform further maintains a modification history data structure to identify memory pages that can be transmitted simultaneous with the execution of the primary virtual machine rather than while the primary virtual machine has been stunned.


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