The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2016

Filed:

Dec. 19, 2013
Applicant:

Analog Devices Global, Hamilton, BM;

Inventors:

Hyman Shanan, Franklin Park, NJ (US);

Michael F. Keaveney, Lisnagry, IE;

Assignee:

Analog Devices Global, Hamilton, BM;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/099 (2006.01); H03L 1/02 (2006.01); H03L 7/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/099 (2013.01); H03L 1/026 (2013.01); H03L 7/104 (2013.01);
Abstract

Apparatus and methods for frequency lock enhancement of phase-locked loops (PLLs) are provided. In one aspect, a PLL can include a VCO having a tuning voltage input and a frequency tuning circuit configured to set a frequency band setting of the VCO. The frequency tuning circuit can include a voltage monitor configured to compare the voltage level of the tuning voltage input to one or more tuning voltage threshold levels, a control circuit configured to control at least a frequency band setting and a bias current setting of the VCO, and an amplitude detection circuit configured to compare an amplitude of an oscillation signal of the VCO to one or more amplitude threshold levels.


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