The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2016

Filed:

Mar. 09, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Shailendra K. Baranwal, Murphy, TX (US);

David W. Stout, Lewisville, TX (US);

Abhijeeth A. Premanath, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/78 (2006.01); H03K 17/689 (2006.01); H03K 17/567 (2006.01); H03K 17/16 (2006.01); H04L 25/02 (2006.01);
U.S. Cl.
CPC ...
H03K 17/689 (2013.01); H03K 17/162 (2013.01); H03K 17/168 (2013.01); H03K 17/567 (2013.01); H04L 25/0266 (2013.01);
Abstract

An LED input emulator to interface a signal source designed for use with an LED optocoupler, to capacitive or other galvanic isolation circuitry, emulating LED forward and reverse bias voltages. VR reverse blocking circuitry includes MPand MPPMOS transistors coupled to an emulator anode port, and to emulate LED reverse bias voltage. VF control circuitry includes a variable resistance (MP) coupled between anode and cathode ports, and a current control circuit coupled to an output node, and to control current through the variable resistance to maintain a desired forward voltage at the output node. In an example embodiment, the VF control circuitry is implemented with an amplifier and a bandgap voltage reference circuit coupled to the output node, generating both reference and feedback voltages input to the amplifier to control the variable resistance.


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