The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2016

Filed:

Jul. 09, 2012
Applicants:

Su-hyoung Kang, Bucheon-si, KR;

Yoonho Khang, Yongin-si, KR;

Sangho Park, Suwon-si, KR;

Jungkyu Lee, Seoul, KR;

Chong Sup Chang, Hwaseong-si, KR;

Inventors:

Su-Hyoung Kang, Bucheon-si, KR;

Yoonho Khang, Yongin-si, KR;

Sangho Park, Suwon-si, KR;

Jungkyu Lee, Seoul, KR;

Chong Sup Chang, Hwaseong-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/136 (2006.01); H01L 29/786 (2006.01); H01L 21/336 (2006.01); H01L 29/417 (2006.01); H01L 27/12 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41733 (2013.01); H01L 27/124 (2013.01); H01L 29/78642 (2013.01); H01L 29/78696 (2013.01); G02F 1/1368 (2013.01);
Abstract

A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film transistor substrate includes an insulating substrate, a gate electrode disposed on a surface of the insulating substrate, a gate insulating layer covering the gate electrode, a semiconductor layer disposed on the gate insulating layer, a source electrode disposed on the semiconductor layer, and a drain electrode disposed on the semiconductor layer and spaced apart from the source electrode. One of the source electrode and the drain electrode is spaced apart from the gate electrode in a plan view. The gate electrode includes a side surface inclined with respect to the surface of the insulating substrate and is partially overlapped with a portion of the source electrode or the drain electrode in a direction perpendicular to the side surface of the gate electrode.


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