The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2016
Filed:
Jan. 17, 2014
Freescale Semiconductor, Inc., Austin, TX (US);
Perry H. Pelley, Austin, TX (US);
Michael B. McShane, Austin, TX (US);
Tim V. Pham, Austin, TX (US);
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
A low profile strip dual in-line memory module () includes a passive interposer support structure () with patterned openings (-) formed between opposing top and bottom surfaces, a plurality of memory chips (D-D) attached to the top and bottom surfaces, and vertical solder ball conductors () extending through the patterned openings to electrically connect the plurality of memory chips, where each memory chip has an attachment surface facing the passive interposer structure and a patterned array of horizontal conductors (e.g.,-) formed on the attachment surface with contact pads electrically connected to the plurality of vertical conductors to define at least one bus conductor that is electrically connected to each memory die in the first and second plurality of memory die.