The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2016
Filed:
Dec. 21, 2010
Applicants:
Akiyoshi Momoi, Bangalore, IN;
Koichi Morishita, Komae, JP;
Inventors:
Akiyoshi Momoi, Bangalore, IN;
Koichi Morishita, Komae, JP;
Assignee:
Canon Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); H04L 7/00 (2006.01); G05B 19/00 (2006.01); H04L 7/10 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0091 (2013.01); H04L 7/0037 (2013.01); G05B 19/00 (2013.01); H04L 7/0008 (2013.01); H04L 7/10 (2013.01);
Abstract
If data received by an external device controller from an external device is delayed by one cycle or more with respect to an output clock of the external device controller, a delay may not necessarily be detected with an existing configuration. When a data latch timing of the external device controller is adjusted, gating of or releasing gating of an output clock of the external device controller is performed in accordance with predetermined gating information, thus improving the accuracy of calibration for adjusting the data latch timing.