The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2016

Filed:

Jun. 26, 2015
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Giuseppe Papotto, Biancavilla, IT;

Giuseppe Palmisano, s.Giovanni la Punta, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03C 3/00 (2006.01); H03M 3/00 (2006.01); H04B 1/16 (2006.01); H04W 56/00 (2009.01); H04L 27/36 (2006.01); H03F 3/24 (2006.01); H03K 5/156 (2006.01);
U.S. Cl.
CPC ...
H04B 1/16 (2013.01); H03F 3/24 (2013.01); H03K 5/1565 (2013.01); H04L 27/364 (2013.01); H04W 56/005 (2013.01); H04W 56/0035 (2013.01);
Abstract

A system for correction of the phase error in in-phase and quadrature signals may include a first signal and a second signal. The system includes a first circuit and a second circuit, each circuit configured for receiving a square-wave input signal and supplying a respective square-wave output signal. The output signal is delayed with respect to the input signal and each circuit is configured in such a way that the propagation delay of a rising edge and the propagation delay of a falling edge between the input signal and the output signal are configurable. The first circuit is configured for receiving the first signal, and the second circuit is configured for receiving the second signal.


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