The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2016

Filed:

May. 15, 2013
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Inventors:

Toshikazu Kondo, Kanagawa, JP;

Jun Koyama, Kanagawa, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/00 (2006.01); G11C 5/14 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 17/00 (2013.01); G11C 5/148 (2013.01); H03K 19/0008 (2013.01); Y10T 307/858 (2015.04);
Abstract

A semiconductor device capable of simply performing power gating and a driving method thereof are provided. Power gating is started passively (automatically in the case of satisfying predetermined conditions). Specifically, the semiconductor device includes a transistor for selecting whether a power source voltage is supplied or not to a functional circuit. The power gating is started by turning off the transistor in the case where a voltage between a source and a drain is less than or equal to a predetermined voltage. Therefore, complicated operation is not needed at the time of starting power gating. Specifically, it is possible to start power gating without a process for predicting the timing at which an arithmetic operation performed in the functional circuit is terminated. As a result, it is possible to start power gating easily.


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