The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2016

Filed:

Nov. 03, 2014
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Satheesh Balasubramanian, Bangalore, IN;

James Dennis Dodrill, Austin, TX (US);

Assignee:

ARM Limited, Cambridge, GB;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H03K 3/3562 (2006.01); H03K 3/037 (2006.01);
U.S. Cl.
CPC ...
H03K 3/35625 (2013.01); H03K 3/0372 (2013.01);
Abstract

A synchronizer flip-flop is provided, which is able to better respond to input values that are not provided for the necessary setup or hold times. The flip-flop includes a latch that includes inverter circuitry for producing a first signal and a signal in dependence on a value of an input signal at a node. A clocked inverter includes a first switch that is connected between a first reference voltage supply and an intermediate node and a second switch, which is connected between the intermediate node and a second reference voltage supply. The first switch is controlled by the first signal and the second switch is controlled by the second signal to produce an output signal at the intermediate node.


Find Patent Forward Citations

Balasubramanian, Satheesh. (2016). Synchroniser flip-flop (U.S. Patent No. 9479147). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9479147

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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