The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2016
Filed:
Dec. 09, 2015
Applicant:
SK Hynix Inc., Icheon-si Gyeonggi-do, KR;
Inventors:
Sung Yong Lim, Uiwang-si, KR;
Seung Hwan Baek, Icheon-si, KR;
Assignee:
SK HYNIX INC., Icheon-Si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/04 (2006.01); G11C 7/22 (2006.01); G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/04 (2013.01); G11C 7/10 (2013.01); G11C 7/12 (2013.01); G11C 7/22 (2013.01);
Abstract
A semiconductor memory device may include a memory cell array, a plurality of page buffers respectively connected to a plurality of bit lines of the memory cell array, and a control logic configured to control the plurality of page buffers to perform an operation on the memory cell array, wherein each of the plurality of page buffers senses a current amount, which varies according to a potential level of a corresponding bit line among the plurality of bit lines, at a sensing node to read data, and a precharge potential level at the sensing node is adjusted according to a temperature.