The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2016

Filed:

Sep. 30, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventor:

Luca Petruzzi, Goedersdorf, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H01L 27/02 (2006.01); H01L 29/78 (2006.01); H01L 21/761 (2006.01); H01L 29/866 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H02H 9/041 (2013.01); H01L 27/0248 (2013.01); H01L 27/0922 (2013.01); H02H 9/043 (2013.01); H01L 21/761 (2013.01); H01L 27/0921 (2013.01); H01L 29/7835 (2013.01); H01L 29/866 (2013.01);
Abstract

A semiconductor device is disclosed. In one embodiment a semiconductor device includes a semiconductor chip including a substrate, a ground terminal configured to be provided with a reference potential and a supply terminal electrically coupled to the substrate, the supply terminal configured to be provided with a load current and configured to be provided with a supply voltage between the substrate and the ground terminal. The semiconductor device further comprises an overvoltage protection circuit disposed in the semiconductor chip and coupled between the supply terminal and the ground terminal, the overvoltage protection circuit including a first transistor having a load current path coupled between the supply terminal and an internal ground node and a second transistor having a load current path coupled between the internal ground node and the ground terminal.


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