The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2016
Filed:
Mar. 30, 2011
Lev Vaskevich, Rehovot, IL;
Mark Elnekave, Ramat Hasharon, IL;
Yuval Peled, Kiryat Ono, IL;
Idan Rozenberg, Raanana, IL;
Lev Vaskevich, Rehovot, IL;
Mark Elnekave, Ramat Hasharon, IL;
Yuval Peled, Kiryat Ono, IL;
Idan Rozenberg, Raanana, IL;
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
There is provided a method for controlling fetch-ahead of Fetch Sets into a decoupling First In First Out (FIFO) buffer of a Variable Length Execution Set (VLES) processor architecture, wherein a Fetch Set comprises at least a portion of a VLES group available for dispatch to processing resources within the VLES processor architecture, comprising, for each cycle, determining a number of VLES groups available for dispatch from previously pre-fetched Fetch Sets, and only requesting a fetch-ahead of a next Fetch Set in the next cycle if one of a select set of criteria related to the number of VLES groups available for dispatch is true.