The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Nov. 26, 2014
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Robert Bahary, Arlington Heights, IL (US);

Eric J Jackowski, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/29 (2006.01); H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 1/0071 (2013.01); H03M 13/2957 (2013.01);
Abstract

A plurality of turbo decoder engines store extrinsic values when concurrently decoding a received signal encoded within rows and columns of an interleaving matrix where interleaved values stay in a same re-ordered row during interleaving. An extrinsic reader and extrinsic writer accesses extrinsic memories using extrinsic addresses. A deinterleaver accesses the extrinsic addressable memories by arranging storage of the extrinsic values by the same rows of the same interleaving matrix that was used to encode the received signal, each of the rows corresponding to one of the plurality of turbo decoder engines, and, in embodiments, can group the extrinsic values such that all the extrinsic values in each one of the rows of the interleaving matrix go in a same one of the plurality of the extrinsic addressable memory. The deinterleaver can skip read of extrinsic values corresponding to dummy entries in the interleaving matrix.


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