The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Mar. 10, 2014
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Ricardo P. Coimbra, Campinas, BR;

Edevaldo Pereira Silva, Jr., Campinas, BR;

Andre L. Couto, Sumare, BR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/42 (2006.01); H03F 3/30 (2006.01); H03F 3/50 (2006.01);
U.S. Cl.
CPC ...
H03F 3/3016 (2013.01); H03F 3/4521 (2013.01); H03F 3/505 (2013.01); H03F 2200/513 (2013.01); H03F 2200/69 (2013.01); H03F 2203/30091 (2013.01); H03F 2203/30123 (2013.01); H03F 2203/45274 (2013.01);
Abstract

In some embodiments, a source follower circuit may include a first level shifter configured to receive an input voltage; an N-type Metal-Oxide-Semiconductor (NMOS) transistor having a gate terminal coupled to an output of the first level shifter; a second level shifter configured to receive the input voltage; a P-type Metal-Oxide-Semiconductor (PMOS) transistor having a gate terminal coupled to an output of the second level shifter and a source terminal coupled to a source terminal of the NMOS transistor; and an amplifier configured to receive the input voltage and to output a current at a node between the source terminal of the NMOS transistor and the source terminal of the PMOS transistor, wherein the current is determined based upon a difference between the input voltage and a reference voltage.


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