The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Mar. 28, 2008
Applicants:

Joo Won Choi, Ansan-si, KR;

Dong Seon Lee, Ansan-si, KR;

Gyu Beom Kim, Ansan-si, KR;

Sang Joon Lee, Ansan-si, KR;

Inventors:

Joo Won Choi, Ansan-si, KR;

Dong Seon Lee, Ansan-si, KR;

Gyu Beom Kim, Ansan-si, KR;

Sang Joon Lee, Ansan-si, KR;

Assignee:

Seoul Viosys Co., Ltd., Ansan-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 31/00 (2006.01); H01L 33/06 (2010.01); B82Y 20/00 (2011.01); H01S 5/343 (2006.01); H01L 33/12 (2010.01); H01L 33/32 (2010.01);
U.S. Cl.
CPC ...
H01L 33/06 (2013.01); B82Y 20/00 (2013.01); H01S 5/34333 (2013.01); H01L 33/12 (2013.01); H01L 33/32 (2013.01);
Abstract

A light emitting diode (LED) having well and/or barrier layers with a superlattice structure is disclosed. An LED has an active region between an N-type GaN-based semiconductor compound layer and a P-type GaN-based semiconductor compound layer, wherein the active region comprises well and/or barrier layers with a superlattice structure. As the well and/or barrier layers with a superlattice structure are employed, it is possible to reduce occurrence of defects caused by lattice mismatch between the well layer and the barrier layer.


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