The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2016

Filed:

Jun. 26, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Lior Arie, Haifa, IL;

Lidar Herooti, Haifa, IL;

Noam Jungmann, Tel Aviv, IL;

Elazar Kachir, Haifa, IL;

Hezi Shalom, Haifa, IL;

Israel A. Wagner, Haifa, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/419 (2006.01); G06F 17/50 (2006.01); G11C 7/18 (2006.01); G11C 16/10 (2006.01); G11C 16/08 (2006.01); G11C 11/413 (2006.01); G11C 11/412 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G06F 17/505 (2013.01); G11C 7/18 (2013.01); G11C 11/412 (2013.01); G11C 11/413 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G06F 2217/78 (2013.01); G11C 16/0483 (2013.01);
Abstract

A design structure can include elements that, when processed in a semiconductor manufacturing facility, produce an SRAM that includes a first local evaluator coupled to a first global bit line (GBL) and a first set of local bit lines (LBLs). The SRAM can also include a second local evaluator communicatively coupled to the first local evaluator. The second local evaluator is coupled to a second GBL and second set of LBLs. The second GBL is consecutive to the first GBL. The first and second evaluators are to generate signals from the LBLs such that one GBL of a combined first and second GBLs is active at any point in a read or write cycle.


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